More About Salil
Salil Raje is senior vice president and general manager of the Adaptive and Embedded Computing Group at AMD, overseeing all aspects of strategy, business management and operations, business development, and engineering for FPGAs, adaptive SoCs, embedded processors, and custom platforms, with an emphasis on growing AMD’s footprint in Edge AI.
Raje joined AMD in 2022 from Xilinx, where he grew a nascent data center business into one of the company’s fastest-growing segments. Over his 17-year tenure at Xilinx, Raje introduced the Vivado Design Suite of ASIC-class algorithms and user interfaces to FPGA designers. He also developed and launched Vitis, enabling seamless application deployment on AMD’s platform.
Prior to Xilinx, Raje was CEO of Hier Design Inc., which he co-founded in 2001. There, he introduced a hierarchical design and design planning tool, PlanAhead, to the FPGA design community and oversaw Xilinx’s acquisition of Hier Design in 2004. Previously, Raje oversaw silicon virtual prototyping technology at Monterey Design Systems and began his career in High Level Synthesis at IBM T. J. Watson Research Center.
Raje holds a Bachelor of Technology in electrical engineering from the Indian Institute of Technology, Madras, and a Master of Science and doctorate in computer science from Northwestern University. He holds eight patents in electronic design tools, ASIC, and FPGA designs, and has written more than 15 industry-recognized research papers. Salil also serves on Carnegie Mellon University’s Electrical and Computing Engineering (ECE) Advisory Council, where he contributes strategic insights to shape educational, research, and outreach activities while helping create opportunities to expand and enhance departmental programs.
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