Cost-Optimized Portfolio Product Selection Guide
Learn more details about the Cost-Optimized Portfolio
Transceiver Optimization at Low Cost and High DSP Bandwidth
With typical lifespans extending well past 15 years, you can depend on AMD devices for the life of your design—extending AMD 7 Series FPGAs and adaptive SoCs through 2040 and AMD UltraScale+™ FPGAs and adaptive SoCs through 2045.
XA7A12T | XA7A25T | XC7S6 | XC7S15 | XC7S25 | XC7S50 | XC7S75 | XC7S100 | |
---|---|---|---|---|---|---|---|---|
Logic Cells | 12,800 | 16,640 | 6,000 | 12,800 | 23,360 | 52,160 | 76,800 | 102,400 |
DSP Slices | 2,000 | 2,600 | 10 | 20 | 80 | 120 | 140 |
160 |
Memory | 171 | 200 | 180 | 360 | 1,620 | 2,700 | 3,240 | 4,320 |
I/O Pins | 150 | 250 | 100 | 100 | 150 | 250 | 400 | 400 |
Jump-start your design cycle and achieve fast time-to-market with the proven hardware, software support, tools, design examples, and documentation available for the kit.
The SP701 Evaluation Kit, equipped with the best-in-class performance-per-watt Spartan 7 FPGA, is built for designs requiring sensor fusion such as industrial networking, embedded vision, and automotive applications.
Balancing cost, power, and performance for I/O connectivity
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