SEV-SNP RMP Initialization Vulnerability
Summary
Researchers from ETHz reported that a malicious hypervisor could corrupt the Reverse Map Table (RMP) during Secure Nested Paging (SNP) initialization.
AMD reproduced the issue and determined it is due to a race condition that can occur while the AMD Secure Processor (ASP) is initializing the RMP. This attack could allow a malicious hypervisor to manipulate the initial RMP content, potentially resulting in loss of SEV-SNP guest memory integrity. AMD has released mitigations for this vulnerability.
CVE Details
| CVE | CVE Description | CVSS Score |
| CVE-2025-0033 | Improper access control within AMD SEV-SNP could allow an admin-privileged attacker to write to the RMP during SNP initialization, potentially resulting in a loss of SEV-SNP guest memory integrity. | 6.0 (Medium) CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:N/I:H/A:N 5.9(Medium) CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:N/VI:N/VA:N/SC:N/SI:H/SA:N |
Affected Products and Mitigation
AMD recommends updating to the SEV Firmware or Platform Initialization (PI) firmware version indicated below (note the PI firmware versions are planned to be released by AMD to the Original Equipment Manufacturers (OEM) on the dates listed below). Please contact your OEM for the BIOS update specific to your product(s).
AMD EPYC™ Series Processors
| Product | Former Codename | Mitigation Option 1: SEV FW + µcode OR Option 2: AGESA | SEV Mitigation Vector Bit1 | Release Date |
| AMD EPYC™ 4004 Series Processors | "Raphael" | Not Affected | ||
| AMD EPYC™ 7001 Series Processors | "Naples" | Not Affected | ||
| AMD EPYC™ 7002 Series Processors | "Rome" | Not Affected | ||
| AMD EPYC™ 7003 Series Processors | “Milan” “Milan-X” |
Option 1:
|
1 | 2025-07-03 |
Option 2:
|
2025-09-04 | |||
| AMD EPYC™ 8004 Series Processors | “Siena” “Genoa” “Genoa-X” “Bergamo” |
Option 1:
|
1 | 2025-06-27 |
| AMD EPYC™ 9004 Series Processors | ||||
Option 2:
|
Tgt. March’26 |
|||
| AMD EPYC™ 9005 Series Processors | "Turin" | Option 1:
|
0 | 2025-06-30 |
Option 2:
|
||||
| AMD EPYC™ 9V64H Processor | MI300C | Not Affected | ||
[1] For more information please reference the SEV Secure Nested Paging Firmware ABI Specification (document 56860) available on https://docs.amd.com
AMD EPYC™ Embedded Series Processors
| Product | Former Code Name | Mitigation | Release Date |
| AMD EPYC™ Embedded 3000 Series Processors | “Embedded SnowyOwl” | Not affected | |
| AMD EPYC™ Embedded 7002 Series Processors | “Embedded Rome” | Not affected | |
| AMD EPYC™ Embedded 7003 Series Processors | “Embedded Milan” | Version TBD | Target release November 2025 |
| AMD EPYC™ Embedded 8004 Series Processors | “Embedded Siena” | EmbGenoaPI-SP5 1.0.0.B | 2025-08-04 |
| AMD EPYC™ Embedded 9004 Series Processors | “Embedded Genoa” | EmbGenoaPI-SP5 1.0.0.B | 2025-08-04 |
| AMD EPYC™ Embedded 9004 Series Processors | “Embedded Bergamo” | EmbGenoaPI-SP5 1.0.0.B | 2025-08-04 |
| AMD EPYC™ Embedded 9005 Series Processors | “Embedded Turin” | Version TBD | Target release November 2025 |
Acknowledgement
AMD thanks Benedict Schlueter, Supraja Sridhara, and Shweta Shinde from ETH Zurich for submitting the report and engaging in coordinated disclosure.
Revisions
| Revision Date | Description |
| 2025-10-13 | Initial publication |
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