AMD GPU Timing-Based Side Channels

Summary

The researchers shared with AMD a report titled “Behind Bars: A Side-Channel Attack on NVIDIA H100 MIG Cache Partitioning Using Memory Barriers”.

Based on MI3XX GPU architectural analysis, AMD has determined that the Guest VM-initiated operations of kernel launch related memory operations only impact the local XCD partition spatially allocated to the Guest VM and do not result in any observable interference on any other Guest VM load operations. Therefore, AMD does not believe that the reported vulnerability exists within the MI3XX GPU designs.

Acknowledgement 

AMD thanks Guo Yanan (University of Rochester), Tyler Sorensen (MSFT Research & University of California Santa Cruz), Reese Levine (University of California Santa Cruz), Cheng Gu (University of Rochester), and Zhenkai Zhang (Clemson University) for submitting the report and engaging in coordinated vulnerability disclosure.

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