DRAM Related Side Channel Attacks
Summary
Researchers have provided AMD with a paper titled “Quo VADIS DDR5? Verifying Addressing of DRAM In Software.”
In this paper, the authors present an approach to verifying DRAM addressing functions from software using the DRAM row conflict side channel. The authors claim that the presented verification methodology provides a cheap and reliable alternative to verification using physical access and expensive measurement equipment such as oscilloscopes. They also demonstrate that they exploited the row conflict side channel as a covert channel and a website fingerprinting attack with a high success rate.
AMD recommends that software developers employ existing best practices, including constant-time algorithms and avoiding secret-dependent data accesses or control flows where appropriate to help mitigate potential side channel attacks.
Acknowledgement
AMD thanks Martin Heckel, Florian Adamsky, Jonas Juffinger, Fabian Rauscher and Daniel Gruss for submitting the report and engaging in coordinated vulnerability disclosure.
Revisions
| Revision Date | Description |
| 2025-09-22 | Initial publication |
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