AMD Spartan™ FPGA Grows Up: Bigger, Smarter, Scalable, More Secure

AMD Spartan™ UltraScale+™ SU200P FPGA in Production
Built for Data Centers, Network Switches, and Industrial Systems

We are pleased to announce that the AMD Spartan™ UltraScale+™ SU200P FPGA is entering volume production in July 2026. The SU200P device is the largest and most capable device in the Spartan UltraScale+ family, built on the proven 16 nm FinFET technology. It brings high I/O, low power, flexible connectivity, and advanced hardware-rooted security with PQC CNSA 2.0 support to the AMD Cost-Optimized Portfolio.

Scale Without Starting Over

The SU200P device tops the nine-member Spartan UltraScale+ family, with a path to scale both up and down. Footprint compatibility across the family, including between the Spartan UltraScale+ SU65P and SU200P devices, preserves board investments as design requirements evolve. When designs grow further, the SBVF900 package is package-compatible with the AMD Kintex™ UltraScale+ Gen 2 family, offering a clear, low-risk path into midrange FPGAs without a board redesign. For teams managing multiple product variants or planning future capability growth, this compatibility helps preserve board investments, reduces redesign effort, and simplifies migration across performance tiers.

Security Built for Connected, Long-Lifecycle Systems

Security is a critical requirement across applications ranging from data center board management and network switching infrastructure to industrial and medical systems that remain deployed for a decade or longer. In these environments, device identity, firmware authenticity, and long-term update protection are foundational requirements.

The Spartan UltraScale+ SU200P FPGA is designed with hardware-based security as a foundational capability, helping customers protect device identity, boot integrity, firmware authenticity, and sensitive data over long deployment lifecycles.

Key security features include:

• Hardware root of trust (HWRoT) secure boot with post-quantum cryptography (PQC): NIST-approved PQC algorithms for firmware and software authentication, aligned with CNSA 2.0
• AES-GCM authenticated encryption: Confidentiality, integrity, and authentication in a single hardware block for secure boot and runtime encryption/decryption
• Dedicated cryptographic resources: AES-GCM, secure hashing, and AIS-20/31 and NIST SP 800-90A/B/C compliant true random number generator (TRNG)
• Physical unclonable function (PUF): Unique per-device identity and symmetric key protection
• Lifecycle security: Authentication mechanisms supporting secure manufacturing, deployment, provisioning, and field updates

Together, these capabilities help establish a trusted platform foundation from secure provisioning and first boot in manufacturing to authenticated firmware updates throughout the operational lifecycle.

Designed for Data Center, Network Switches, and Industrial Applications

Modern infrastructure deployments share a common challenge: they operate at the edge of complex systems, face evolving standards, and must remain trusted from first boot through years of field operation. Spartan UltraScale+ SU200P FPGA’s combination of programmable I/O, high-speed connectivity, and hardware-rooted security makes it well-suited across different markets where this combination of demands is most acute. 

Secure Board Management Controllers for Evolving Data Centers

Server motherboard complexity continues to rise as data center platforms add more sensors, power domains, status signals, interfaces, and system-control functions while maintaining high uptime and serviceability. AI-server growth is further increasing demand for advanced CPU and GPU platforms, driving the need for more adaptable board-level management and control.

In this environment, the companion FPGA is becoming increasingly important. It must ingest larger volumes of board data, support diverse telemetry and sequencing requirements, and bridge protocols. Increasingly, the FPGA may also serve as a platform root of trust (pRoT). It can authenticate the platform via device attestation, anchoring a secure boot chain before the host CPU initializes. This protects the device identity with PUF-based key management, and supports PQC to future-proof firmware authentication across rapidly evolving server designs.

SU200P is well suited for this role, offering flexible I/O with 3.3 V support, control-plane programmability, high-speed connectivity, PCIe® Gen4 support, and up to 572 I/O pins. Designers developing new AMD EPYC™ or Embedded Ryzen™ processors can use SU200P to support greater integration and adopt emerging OCP standards such as Low-speed Transport Protocol Interface (LTPI) and Management Port Embedded Secure Tunnel Interface (M-PESTI). This enables server and embedded platform designers to reduce redesign risk while building more integrated and adaptable management architectures that can evolve alongside emerging standards, next-generation processor platforms, and changing data center requirements.

Flexible Connectivity for Network Switches Infrastructure

Networking systems must bridge evolving standards, management interfaces, timing requirements, and platform-specific control logic. Switch designers often need programmable devices that can support interface adaptation, status monitoring, control-plane glue logic, and high-speed connectivity in a compact, power-sensitive board in secure environments.

SU200P integrates the critical control and management functions of a modern network switch into a single programmable device, simplifying board design and reducing external component count. PCIe Gen4, high-speed GTH transceivers, and up to two hard memory controllers deliver the fabric bandwidth and on-device buffering the application demands, while a soft AMD MicroBlaze™ V processor with RTOS handles board management natively on the FPGA.

Security is integrated into the configuration and management architecture rather than treated as an external add-on. OSPI and PMC configuration flows enable secure boot and authenticated field updates out of the box. A HWRoT anchors device authentication from the first power-on. Combined with PQC support and PUF-based device identity, SU200P gives network switch designers a programmable platform they can trust across the full product lifecycle, from secure manufacturing through authenticated field updates.

This allows switch designers to integrate control-plane management, interface bridging, security, and system connectivity into a single programmable device while retaining the flexibility to adapt to evolving network architectures and interface standards.

Longevity and Adaptability for Industrial Systems

Industrial systems are defined by long operating lifecycles, extended qualification cycles, and the need to support evolving connectivity and control requirements over time. Factory automation, robotics, sensor aggregation, and edge-control platforms require programmable devices that can adapt as interfaces, sensors, and workloads evolve over time.

The Spartan UltraScale+ SU200P FPGA directly addresses this; with a lifecycle commitment through 2045+, designers can build long-lived platforms without facing premature obsolescence. The device also integrates up to 572 I/O pins, 18.0 Mb of UltraRAM, GTH transceivers, and up to two hard memory controllers, helping reduce external memory interface logic, board area, power consumption, and BOM cost.

Security is equally critical in connected industrial environments. The SU200P FPGA’s HWRoT, PUF, and PQC support give industrial designers a foundation for authenticated firmware updates and protected device identity across long deployment lifecycles.

For industrial customers, the value is the ability to design once, preserve investment across product variants, and support long-lifecycle embedded platforms with a programmable device family backed by AMD FPGA tools and ecosystem.

Get Started Today with AMD Spartan™ UltraScale+™ SU200P FPGAs

Spartan UltraScale+ SU200P enters volume production in July 2026, and the path from evaluation to deployment is designed to be straightforward.

Start Now:

• Order SU200P silicon through AMD sales or an authorized AMD distributor.
• Download AMD Vivado™ Design Suite and begin building, simulating, implementing, and debugging FPGA designs.
• Visit the Spartan UltraScale+ FPGA product page.
• Contact AMD Sales or an authorized distributor for availability, ordering information, package options, and production-planning support.

For designers building the next generation of infrastructure and embedded platforms, SU200P is ready.