Documentation
Explore all Versal AI Edge Series Gen 2 data sheets, documentation, and more.
Overview
Setting a New Bar for Tamper-Resistant Compute
AMD Versal™ tamper-resistant devices are the industry’s first adaptive SoCs or FPGAs with built-in protection against physical attacks on the silicon backside,1 supporting the needs of security-critical applications.
Backside Protection
Protection die helps shield critical information from physical attacks.
Foundational Security
CNSA 2.0 compliant with enhancements to core security features.
High-Performance Compute
Programmable logic, AI Engines, and embedded CPUs.
Deploy Confidently
Backed by proven AMD design tools, technical support, and partner ecosystem.
Versal AI Edge Series Gen 2
Versal AI Edge Series Gen 2 tamper-resistant adaptive SoCs combine built-in backside protection and foundational security enhancements with production-proven programmable logic, AI Engines, and high-performance Arm® CPUs – all in a single device.
- Integrated protection against backside attacks
- New ML-DSA and SLH-DSA hardware accelerators
- Enhanced glitch detection and ASU key vault
- Versal architecture programmable logic
- AI Engines for ML or DSP workloads
- Up to 229k DMIPS scalar compute
Pulling Ahead in the Anti-Tamper Race
As backside attacks become cheaper and more accessible, they pose an increasing risk to systems that must protect cryptographic keys, application data, and other sensitive information. AMD tamper-resistant devices use 3D active-on-active technology to deliver backside protection without the need for expensive mechanical or ASIC-based solutions – enabling users to meet their security goals without compromising on performance, size, weight, power, or time to market.
Applications & Industries
Addressing A Multi-Market Anti-Tamper Challenge
Backside and other physical attacks pose a risk to any application that handles sensitive information – from critical infrastructure to avionics, secure networking, and beyond.
Industrial
- Critical Infrastructure
- Energy and Grid Systems
- Industrial Control Systems
Aerospace & Defense
- Avionics, UAS, UAM
- Mission Computing
- Detection and Tracking
Data Center
- Secure Networking
- Bank Infrastructure
- Sensitive IP Protection
Product Specifications
Each tamper-resistant device has a footprint-compatible standard counterpart with identical compute, memory, I/O, and other resources. Users can migrate a design from a standard device to the tamper-resistant counterpart without the need to re-run synthesis and place-and-route.
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Standard Devices |
Tamper-Resistant Devices2 |
||||
Device Name |
2VE3358 |
2VE3558 |
2VE3858 |
2VE3358TR |
2VE3558TR |
2VE3858TR |
Advanced Security Features |
- |
Backside protection + cryptographic binding |
||||
System Logic Cells (K) |
207 |
492 |
1,188 |
207 |
492 |
1,188 |
CLB LUTs (K) |
95 |
225 |
543 |
95 |
225 |
543 |
DSP Engines |
184 |
700 |
2,064 |
184 |
700 |
2,064 |
Processing System |
8x Arm® Cortex®-A78AE Application Cores, 10x Arm Cortex-R52 Real-Time Cores |
|||||
AI Engine Tiles (AIE-ML v2) |
24 |
96 |
144 |
24 |
96 |
144 |
Max INT8 TOPS |
31 |
123 |
184 |
31 |
123 |
184 |
Max. PL-Facing Transceivers |
4 |
12 |
20 |
4 |
12 |
20 |
Max. Programmable I/O (X5IO / HDIO) |
260 / 44 |
384 / 88 |
512 / 44 |
260 / 44 |
384 / 88 |
512 / 44 |
Visit the Versal AI Edge Series Gen 2 product page and review the Product Selection Guide for additional details.
Ecosystem
Backed By 40 Years of Adaptive Computing Leadership
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Proven Tools
- AMD Vivado™ and Vitis™ Software
- Open-source embedded software
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World-Class Tech Support
- Field Applications Engineers
- Global tech support & online resources
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Broad Ecosystem
- 400+ FPGA & adaptive SoC partners
- IP, design services, software, & more
Support & Resources
Access technical documentation, tools, and training to advance your design with AMD tamper-resistant devices.
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Footnotes
- Based on AMD internal analysis in November 2026, of the anti-tamper security features (if any) and standard security features of competing FPGAs and adaptive SoCs. (VER-118)
- Tamper-resistant does not mean tamper-proof. Protection applies to specified physical attack methods; see product documentation for the applicable threat model and limitations. (GD-256)
Footnotes
- Based on AMD internal analysis in November 2026, of the anti-tamper security features (if any) and standard security features of competing FPGAs and adaptive SoCs. (VER-118)
- Tamper-resistant does not mean tamper-proof. Protection applies to specified physical attack methods; see product documentation for the applicable threat model and limitations. (GD-256)