Binary CAM (BCAM)
The Binary CAM LogiCORE™ IP (BCAM) implements an associative array data structure also known as a content-addressable memory. The BCAM stores (key, response) entries with arbitrary key and response bit strings and allows the retrieval of the response based on an exact match of all bits in the search key with all bits in key.
Cached DRAM Binary CAM (CDBCAM)
The DRAM Binary CAM LogiCORE™ IP (CDBCAM) implements an associative array data structure also known as a content-addressable memory using DRAM for storage for Versal devices. The DRAM BCAM stores (key, response) entries with arbitrary key and response bit strings and allows the retrieval of the response based on an exact match of all bits in the search key with all bits in the key.
Semi-Ternary CAM (STCAM)
The Semi-Ternary CAM LogiCORE™ IP (STCAM) implements an associative array data structure also known as a content-addressable memory. The STCAM stores (key, mask, priority, response) entries with arbitrary key, mask and response bit strings and allows for the retrieval of the response based on ternary matching of the lookup key. Ternary matching allows multiple entries to match the same lookup key. The entry with lowest priority is selected as the winner. The STCAM supports a limited number of unique masks, that is each mask is shared by multiple entries. This allows for a considerable logic and memory reduction compared to TCAMs. The STCAM is well suited for applications requiring efficient storage of entries using multiple, but a limited number of masks. For example, longest prefix matching of the IP address for IP forwarding tables or OVS mega-flow lookup tables.
Ternary CAM (TCAM)
The Ternary CAM LogiCORE™ IP (TCAM) implements an associative array data structure also known as a ternary content-addressable memory. The TCAM stores (key, mask, priority, response) entries with arbitrary key, mask, priority and response values and allows the retrieval of the response based on a ternary match of all bits of the masked search key with all bits of the masked key. The key is bit maskable allowing arbitrary bits in the key to be set to ternary state (don't care). Ternary matching allows multiple entries to match and the priority value of the entry determines the winning response.
DRAM Semi-Ternary CAM (DSTCAM)
The DRAM Semi-Ternary CAM LogiCORE™ IP (DSTCAM) implements an associative array data structure also known as a content-addressable memory storage for Versal devices. The DSTCAM stores (key, mask, priority, response) entries with arbitrary key, mask and response bit strings and allows for the retrieval of the response based on ternary matching of the lookup key. Ternary matching allows multiple entries to match the same lookup key. The entry with lowest priority is selected as the winner. The DSTCAM supports a limited number of unique masks, that is each mask is shared by multiple entries. The DSTCAM is well suited for applications requiring efficient storage of a large number of entries using multiple, but a limited number of masks. For example, longest prefix matching of the IP address for IP forwarding tables or OVS mega-flow lookup tables and for searching large tables generally.
Note: The CAM solutions are based on a combined hardware and software implementation.
