AMD Spartan™ UltraScale+™: The FPGA You Can Count On. In Every Way That Matters.
May 12, 2026
Designing cost- and power-constrained applications is challenging enough, but finding an FPGA that checks all the boxes is even harder. With many options available, engineers must carefully evaluate a wide range of design metrics before making the right choice.
AMD Spartan UltraScale+ FPGAs Make Your Decision Easy
Compared to similar-class FPGAs, AMD Spartan™ UltraScale+™ FPGAs deliver higher performance, lower power, smaller footprint, and the peripherals modern applications demand— all in one device:
- Up to 42% Lower Power1
- Help stay within tight thermal and power budgets, avoid active cooling, and reduce total system BOM and operating costs
- 44% Smaller Overall Footprint2
- Simplify PCB routing and enable smaller enclosures, particularly for handheld applications
- 16.3 Gb/s Transceivers | PCIe® Gen 4x8 | 572 Max I/O
- Connect more sensors and peripherals, and reduce latency with latest interface standards
- Up to 2.25X Higher Performance/Watt3
- Run richer workloads in the same power envelope, or deliver the same functionality at significantly lower power
- Up to 29% Higher FMAX4
- Use your FPGA to do more and absorb future feature growth
- Robust security features with post-quantum cryptography (PQC) & CNSA 2.0 compliant secure boot
Don’t settle for devices that are just good enough. Spartan UltraScale+ FPGAs deliver across the key metrics that matter, and then some.
2.25X Performance/Watt Advantage: A Choice Most Designers Never Get
Performance/watt is the metric that governs everything downstream: your thermal evaluation, power delivery architecture, and bill of materials (BOM).
AMD carried out an evaluation of 26 Open Core designs that show Spartan UltraScale+ FPGAs deliver up to 29% faster fabric than similar class devices such as Altera® Agilex® 3 FPGAs4 — that’s a whole speed grade faster. A 2.25X advantage over Altera Agilex 3 FPGAs3 hands you a decision most designers never get to make: run a richer, more complex workload within your existing power budget, or deliver the same workload at dramatically lower power. Either way, your system wins.
Lower Design Complexity and Total System Cost
In many low-end applications, the FPGA talks to an external discrete MCU for system management and control. With significantly better performance/watt, designers now have the option of integrating the MCU functionality within the FPGA fabric itself. Leverage the AMD MicroBlaze™ V soft processor on Spartan UltraScale+ FPGAs’ performant fabric to process more data per clock cycle. Lower your design complexity and total system cost by using fewer discrete components. Additionally, you can shrink your design size by choosing a smaller package. Spartan UltraScale+ FPGAs give you back PCB floorspace with a 44% smaller overall form factor than Altera Agilex 3 FPGAs.2 Alternatively, if having transceivers in the smallest form factor is a priority, the Spartan UltraScale+ (SU45P) FPGA provides a 77% smaller footprint relative to the smallest Agilex 3 device (A3C100) with transceivers enabled.2
Real Gains Across Real Applications
All of these advantages translate to real gains across various vertical applications. A few examples are:
- Machine Vision: Today’s industrial cameras require low cost, lower power, and a compact form factor, while supporting the latest sensor and output interfaces to keep up with the rapid pace of production lines. Spartan UltraScale+ FPGAs meet all of these requirements and ensure your design stays modern throughout its lifetime.
- Industrial Automation: Maximizing productivity through automation requires flexible connectivity, real-time data processing, as well as functional safety and security. With “any to any” connectivity, up to 384 DSP slices, and state-of-the-art security features, Spartan UltraScale+ FPGAs deliver.
- Data Center: Spartan UltraScale+ FPGAs enable next-generation server designs with PQC, while providing the highest I/O-to-logic ratio in the AMD Cost-Optimized FPGA portfolio,5 and integration with AMD EPYC™ Server CPUs.
Read more about the application-specific advantages in the linked solution briefs.
Supplier Stability is Critical
In today's supply environment, you’re not just choosing an FPGA, you’re choosing a partner that can commit to your lifecycle requirements. Long-term supply confidence, toolchain stability, and vendor staying power are critical selection parameters, especially for industrial and automotive programs with 10–15+ year product lifecycles.
The proven track record and stability AMD offers are critical to customer success. Backed by a long‑standing partnership with TSMC, AMD delivers supply chain continuity you can count on. The Spartan UltraScale+ FPGA lifecycle has already been extended to 2045+.
With Spartan UltraScale+ devices, you’re getting higher performance, lower power, a smaller footprint, and the latest peripherals, from a supplier you can count on.
Start designing with Spartan UltraScale+ FPGAs today.
Footnotes
- Based on AMD internal analysis in November 2025, comparing power tool estimates from Power Design Manager 2025.1 for Spartan UltraScale+ devices and PTC Power estimation 2025.3 tools to estimate the power consumption of AMD Spartan UltraScale+ FPGAs versus Altera Agilex 3 devices. Actual power consumption and power savings achieved will vary based on device, customer design specifications, system configuration, and other factors (SUS-024)
- Based on data sheet analysis performed in April of 2026. For either the same logic capacity (density) or the same resources, Spartan UltraScale+ FPGAs offer smaller package form factor options than Altera Agilex 3 FPGAs. Results may vary by configuration. (SUS-026)
- Based on AMD internal analysis in November 2025, comparing power tool estimates from Power Design Manager 2025.1 for UltraScale+ devices and PTC Power estimation 2025.3 tools to estimate the power consumption of AMD Spartan UltraScale+ FPGAs versus Altera Agilex 3 devices against FMAX performance results from Vivado 2025.1 for Spartan UltraScale+ devices and Quartus 25.3 for Altera Agilex 3. Actual power consumption and power savings achieved will vary based on device, customer design specifications, system configuration, and other factors. (SUS-025)
- Based on AMD testing in July 2025, taking the FMAX scores (MHz) of the (16 nm) AMD Spartan UltraScale+ SU35P-1LV FPGA (slowest speed grade), run on 26 designs to meet timing (< 1 ns slack and a magnitude of <= 10% of the requested time period) in AMD Vivado EDA tool 25.1, compared to the (10 nm “Intel 7”) Altera Agilex 3 A3Y135-7S FPGA in Quartus EDA tool 25.1. Stated results based on the calculated geomean average over 26 designs. Results may vary based on device and speed grade, customer design specifications, system configurations, and other factors. (SUS-021)
- Based on AMD internal analysis December 2023, comparing the total I/O-to-logic-cell ratio for AMD Spartan UltraScale+ FPGAs to previous generations of AMD cost-optimized FPGAs. (SUS-001)
- Based on AMD internal analysis in November 2025, comparing power tool estimates from Power Design Manager 2025.1 for Spartan UltraScale+ devices and PTC Power estimation 2025.3 tools to estimate the power consumption of AMD Spartan UltraScale+ FPGAs versus Altera Agilex 3 devices. Actual power consumption and power savings achieved will vary based on device, customer design specifications, system configuration, and other factors (SUS-024)
- Based on data sheet analysis performed in April of 2026. For either the same logic capacity (density) or the same resources, Spartan UltraScale+ FPGAs offer smaller package form factor options than Altera Agilex 3 FPGAs. Results may vary by configuration. (SUS-026)
- Based on AMD internal analysis in November 2025, comparing power tool estimates from Power Design Manager 2025.1 for UltraScale+ devices and PTC Power estimation 2025.3 tools to estimate the power consumption of AMD Spartan UltraScale+ FPGAs versus Altera Agilex 3 devices against FMAX performance results from Vivado 2025.1 for Spartan UltraScale+ devices and Quartus 25.3 for Altera Agilex 3. Actual power consumption and power savings achieved will vary based on device, customer design specifications, system configuration, and other factors. (SUS-025)
- Based on AMD testing in July 2025, taking the FMAX scores (MHz) of the (16 nm) AMD Spartan UltraScale+ SU35P-1LV FPGA (slowest speed grade), run on 26 designs to meet timing (< 1 ns slack and a magnitude of <= 10% of the requested time period) in AMD Vivado EDA tool 25.1, compared to the (10 nm “Intel 7”) Altera Agilex 3 A3Y135-7S FPGA in Quartus EDA tool 25.1. Stated results based on the calculated geomean average over 26 designs. Results may vary based on device and speed grade, customer design specifications, system configurations, and other factors. (SUS-021)
- Based on AMD internal analysis December 2023, comparing the total I/O-to-logic-cell ratio for AMD Spartan UltraScale+ FPGAs to previous generations of AMD cost-optimized FPGAs. (SUS-001)